1. Field of the Invention
The present invention relates to the field of fabrication of integrated circuits, and, more particularly, to a method and structure for estimating an overlay accuracy that is obtained in forming successive material layers requiring the alignment of the successive material layers to each other.
2. Description of the Related Art
Fabrication of integrated circuits requires tiny regions of precisely controlled size to be formed in a material layer of an appropriate substrate, typically a silicon substrate. These tiny regions of precisely controlled size are generated by patterning the material layer by performing known photolithography and etching processes, wherein a mask layer is formed over the material layer to be treated to define these tiny regions. Generally, a mask layer may consist of or is formed by means of a layer of photoresist that is patterned by a lithographic process. During the lithographic process, the resist may be spin-coated onto the wafer surface and is then selectively exposed to ultraviolet radiation. After developing the photoresist, depending on the type of resist, positive resist or negative resist, the exposed portions or the non-exposed portions are removed to form the required pattern in the layer of photoresist. Since the dimensions of the patterns in sophisticated integrated circuits are steadily decreasing, the equipment used for patterning device features have to meet very stringent requirements with regard to resolution and overlay accuracy of the involved fabrication processes. In this respect, resolution is considered as a measure specifying the consistent ability to print minimum size images under conditions of predefined manufacturing variations. One important factor in improving the resolution is represented by the lithographic process, in which patterns contained in a photo mask or reticle are optically transferred to the substrate via an optical imaging system. Therefore, great efforts are made to steadily improve optical properties of the lithographic system, such as numerical aperture, depth of focus and wavelength of the light source used.
The quality of the lithographic imagery is extremely important in creating very small feature sizes. Of at least comparable importance, however, is the accuracy with which an image can be positioned on the surface of the substrate. Integrated circuits are fabricated by sequentially patterning material layers, wherein features on successive material layers bear a spatial relationship to one another. Each pattern formed in a subsequent material layer has to be aligned to a corresponding pattern formed in the previously patterned material layer within specified registration tolerances. These registration tolerances are caused by, for example, a variation of a photoresist image on the substrate due to non-uniformities in such parameters as resist thickness, baking temperature, exposure and development. Furthermore, non-uniformities of the etching processes can also lead to variations of the etched features. In addition, there exists an uncertainty in overlaying the image of the pattern for the current material layer to the etched pattern of the previously formed material layer while photolithographically transferring the image onto the substrate. Several factors contribute to the ability of the imagery system to perfectly overlay two layers, such as imperfections within a set of masks, temperature differences at the different times of exposure, and a limited registration capability of the alignment tool. As a result, the dominant criteria, determining the minimum feature size that may finally be obtained, are resolution for creating features in individual substrate layers and the total overlay error to which the above explained factors, in particular the lithographic process, contribute.
Therefore, it is essential to steadily monitor the resolution, i.e., the capability of reliably and reproducibly creating the minimum feature size, also referred to as critical dimension (CD), within a specific material layer, and to steadily determine the overlay accuracy of patterns of material layers that have been successively formed and that have to be aligned to each other. Recently, scatterometry has become a powerful tool in characterizing periodic patterns of features with a size in the range of 1 μm to 0.1 μm and less. In analyzing a substrate by scatterometry, the substrate containing a periodic structure is illuminated with radiation of an appropriate wavelength range and the diffracted light is detected to obtain measurement spectra, from which information on the periodic structure may be extracted. Many types of apparatus may be used for illumination and detecting of the diffracted light beam. For example, U.S. Pat. No. 5,867,276 describes a so-called two-θ-scatterometer, wherein the angle of incidence of a light beam is continuously varied by synchronously rotating the sample and the detector. Furthermore, this document describes a scatterometer system utilizing a rotating block to translate a light beam emitted from a light source to different points to the entrance aperture of a lens to illuminate the substrate at different angles of incidence. This document further describes a scatterometer with a fixed angle of incidence that utilizes a multi-wavelength illumination source to obtain the required information from the diffracted multi-wavelength beam. From this information contained in the measurement spectrum, the optical and dimensional properties of the individual elements that form the periodic structure and the thickness of underlying films can be extracted, for example, by statistical techniques. The sample parameters of interest may include the width of lines if the periodic pattern contains lines and spaces, the sidewall angle, and other structural details. In case of a more complex periodic structure having, for example a two-dimensional periodicity, the parameters may include dimensional properties such as hole diameter or depth.
Frequently, metrology tools such as an ellipsometer and the like, are employed as “scatterometers,” which emit a substantially linearly polarized light beam, wherein structural information may then be obtained on the basis of changes in the polarization state of the light beams scattered from the periodic structure. Although scatterometry has proven to be a promising candidate in determining structural properties of periodic structures, applying scatterometry to overlay measurements requires the provision of specially designed overlay patterns as well as the establishment of corresponding reference data to extract the required information. In particular, establishing the reference data may be a complex and laborious procedure, since the response of a periodic structure is theoretically derived from the basic equations (Maxwell's equations). Usually, reference data for a specific type of periodic structure or overlay structure is calculated for a variety of different parameter values and is then stored in a so-called library. The measurement data is then compared with the data of the library to extract the required information. Since, generally, a pattern for measurement of overlay accuracy is more complex than a periodic pattern for determining, for example, critical dimensions, great effort is required to establish a corresponding overlay library. A further criterion in determining the overlay accuracy is the floor space that corresponding overlay structures occupy on the substrate. As chip area is very precious, it would be highly desirable to efficiently determine the overlay accuracy without wasting an undue amount of chip area.
In view of the above-mentioned problems, there exists a need for an improved technique for determining the overlay accuracy to thereby simplify the measurement procedure and/or reduce the required chip area occupied by the corresponding structures.